A typical computer system may execute firmware such as a basic input/output system (BIOS) to boot up the system. More specifically, through the execution of the BIOS, the computer system may detect, test, and configure platform hardware in preparation for subsequent phases of firmware execution and the eventual launch of its operating system. The boot phase of the computer system typically involves the testing of memory, which may take a relatively long time and thus, may significantly contribute to the overall boot up time of the computer system.
For processor based systems or platforms having current and proposed initialization processes such as those provided by the Unified Extended Firmware Interface (UEFI) or other such interfaces, early platform initialization code may require access to a memory before the primary memory subsystems of the platform have been initialized.
Further, platforms having multi-processor or multi-core architectures may present unique challenges during boot up. One boot model in such multi-core or many-core systems may enable only one core and select this one core with a hardware state machine that runs at power up or a startup event to select the core. However, in such a scheme, this one core may become a single point of failure that compromises the overall reliability of the system.
Also, as instant-restart becomes an important feature in servers and other computers, taking advantage of multiple cores for a faster boot process may be attractive. It would be desirable therefore, for pre-EFI and similar initialization software to both maximally parallelize the initialization across multiple cores and be robust in the face of a failed core or errant core or a failed or malfunctioning segment of the cache associated with a core.
It will be appreciated that for simplicity and clarity of illustration, elements shown in the drawings have not necessarily been drawn accurately or to scale. For example, the dimensions of some of the elements may be exaggerated relative to other elements for clarity or several physical components included in one functional block or element. Further, where considered appropriate, reference numerals may be repeated among the drawings to indicate corresponding or analogous elements. Moreover, some of the blocks depicted in the drawings may be combined into a single function.